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Memory barrier
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11	Review of last lecture  Architecture case studies  Memory performance is often the bottleneck  Parallelism grows with compute performance Add to Reading List Source URL: spcl.inf.ethz.ch Language: English - Date: 2015-10-04 17:36:16 Computer memory Transaction processing Computer architecture Concurrency control Compiler construction Memory ordering Consistency model Cache coherence Memory barrier Linearizability Schedule Sequential consistency
12	Relaxed memory models must be rigorous ˇ c´ık3 Susmit Sarkar2 Francesco Zappa Nardelli1 Peter Sewell2 Jaroslav Sevˇ Luc Maranget1 Mark Batty2 Jade Alglave1 1 Add to Reading List Source URL: www0.cs.ucl.ac.uk Language: English - Date: 2012-09-10 07:41:00 Instruction set architectures Computer memory X86 architecture X86-64 Java memory model X86 Memory barrier Spinlock Memory ordering Low-level programming language Itanium ARM architecture
13	Barrier Elision for Production Parallel Programs Milind Chabbi Wim Lavrijsen Wibe de Jong Add to Reading List Source URL: crd.lbl.gov Language: English - Date: 2015-04-20 03:22:16 Parallel computing Barrier Synchronization Memory barrier OpenMP Ease
14	Verifying Read-Copy-Update in a Logic for Weak Memory Joseph Tassarotti Derek Dreyer Viktor Vafeiadis Add to Reading List Source URL: plv.mpi-sws.org Language: English - Date: 2015-04-27 14:17:24 Concurrency control Computer architecture Computing Software Read-copy-update Memory barrier Linearizability Mutual exclusion Synchronization Futures and promises
15	Advanced x86: BIOS and System Management Mode Internals Memory Map Xeno Kovah && Corey Kallenberg LegbaCore, LLC Add to Reading List Source URL: opensecuritytraining.info Language: English - Date: 2015-10-14 22:09:41 Computer memory Computing Computer hardware Computer architecture Dynamic random-access memory ALi Corporation Upper memory area Memory controller 3 GB barrier
16	Scalable Read-mostly Synchronization Using Passive Reader-Writer Locks Ran Liu ‡ † , Heng Zhang †, Haibo Chen † ‡Software School, Fudan University †Institute of Parallel and Distributed Systems, Shanghai Jiao Add to Reading List Source URL: ipads.se.sjtu.edu.cn Language: English - Date: 2014-05-26 02:02:09 Concurrency control Computer architecture Computing Software Readerswriter lock Non-blocking algorithm Memory barrier Synchronization Monitor File locking Kernel Linux kernel
17	Verifying Read-Copy-Update in a Logic for Weak Memory Joseph Tassarotti Derek Dreyer Viktor Vafeiadis Add to Reading List Source URL: plv.mpi-sws.org Language: English - Date: 2015-04-27 14:19:25 Concurrency control Computer architecture Computing Software Read-copy-update Memory barrier Linearizability Mutual exclusion Synchronization Futures and promises
18	The OpenACC Application Programming Interface R 1 Add to Reading List Source URL: www.openacc.org Language: English - Date: 2016-02-12 11:39:31 Parallel computing OpenACC OpenMP OpenCL Compute kernel CUDA Graphics processing unit Memory barrier Thread Futures and promises Barrier Central processing unit
19	Computer Science Technical Report High Performance Unified Parallel C (UPC) Collectives For Linux/Myrinet Platforms Alok Mishra and Steven Seidel Michigan Technological University Computer Science Technical Report Add to Reading List Source URL: www.upc.mtu.edu Language: English - Date: 2006-02-22 16:46:56 Parallel computing Unified Parallel C Partitioned global address space MPICH OpenMP Thread safety Thread Collective operation Myrinet Shared memory Barrier Universal Product Code
20	M EMORAX, a precise and sound tool for automatic fence insertion under TSO ? Parosh Aziz Abdulla1 , Mohamed Faouzi Atig1 , Yu-Fang Chen2 , Carl Leonardsson1 , and Ahmed Rezine3 1 Add to Reading List Source URL: user.it.uu.se Language: English - Date: 2013-11-24 07:41:22 Theoretical computer science Mathematics Finite automata Computing Theory of computation Formal methods Reachability problem Logic in computer science Model checking Memory barrier Preorder Algorithm

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